Analog Design Engineer - Memory, High Speed I/O, DDR
📋 Role Overview & Responsibilities
Analog Design Engineer - Memory, High Speed I/O, DDR
The candidate will be a member of the Memory I/O design team designing High Speed IO circuits and supporting the definition, specification, system simulation and implementation of future DDR/LPDDR IPs. The focus of the activity will be centered around the circuit design of critical high-speed analog and digital blocks, definition of specifications for the high-speed data path.The candidate will have a strong Fundamentals in Analog and Digital Circuit Design and have analytical thinking and inventive spirit in combination with a solid understanding of risks and risk mitigation. Must be a strong/effective communication skills and have a enthusiastic team-first mentality.
Responsibilities
Design circuits for High Speed IOs that include Transmitter, Receiver – CTLE/DFE, Delay Lines, DAC, OpAmp, Comparator and voltage regulators.Contribute to the definition of circuit architecture and to the design implementation of various state-of-the-art, low power blocks, and area efficient circuits for DDR/LPDDR PHYsDevelop models for link-level statistical performance simulation of the PHY (Link Training, PHY, DRAM, DB/RCD, DFE training, Transmit Equalization) and application of the same to the development and optimization of design.Work closely with various disciplines, especially Analog Mixed Signal design, RTL and Firmware, as well as Design Verification to ensure optimal implementation of the overall PHY architecture and algorithms and full coverage of the features.Participate and contribute to the definition of development flows that improve efficiency and quality of execution.
Preferred Experience
A proven successful track record in circuit design for High Speed IOs.Hands-on knowledge of algorithms and equalization/calibration/clocking techniques for high-speed circuit design.Solid knowledge of industry-standard tools and best-in-class practices for PHY modeling, both in terms of abstracted models (e.g. Matlab/Simulink) as well as Verilog/AMS-based.Good knowledge of IO and system integration (signaling/equalization techniques, signal integrity, power integrity).Ability to dig into RTL or FW code supporting the custom circuit implementation.Bachelors, Masters or PHD in Electrical or Computer Engineering.
Please send your resume to jerald.baker@motektech.com
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